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ST6G3238BE
Dual supply level translator for SD/ MINISD/ T-FLASH With 8KV contact discharge ESD protection
Features
High speed: tPD = 4.4ns (Typ.) at TA = 85C VCCB = 2.7V VCCA = 1.8V Low power dissipation: ICCA = ICCB = 5A (Max.) at TA = 85C Balanced propagation delays: TPLH TPHL Power down protection on inputs and outputs 26 series resistor on A-Side EMI filter on B side Integrated pull-up and pull-down resistor on B side Operating voltage range: - VCCA (Opr) = 1.4V to VCCB - VCCB (Opr) = 1.4V to 3.6V Latch-up performance exceeds 500mA (JESD17) ESD protection for card side (B port, CD and WP pins) 8kV, IEC 61000-4-2 ESD or contact discharge: HBM > 15kV (MIL STD 883 method 3015); ESD protection for A-port: HBM > 2kV (MIL STD 883 method 3015); ROHS Compliant for TFBGA25 Package

TFBGA25
Description
The ST6G3238BE is a dual supply low voltage CMOS Level Translator for SD/ MiniSD/ T-Flash fabricated with sub-micron silicon gate and fivelayer metal wiring C2MOS technology. Designed for use as an interface between a 3.3V bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V, 3.3V/2.5V and 2.5V/1.8V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation. The A port is designed to track VCCA. The B port is designed to track VCCB. This device is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by CMD-dir/ DATA0-dir/ DAT123-dir inputs. The Bport interfaces with the 3V bus, the A-port with the 2.5V and 1.8V bus. All inputs are equipped with protection circuits against static discharge, giving them 2kV (on Aside except CD and WP pins) and 15kV on (B side, CD and WP pins) ESD immunity and transient excess voltage. See the section on integrated ESD protections and resistors for more information.

Order code
Part Number ST6G3238BE ST6G3238BETBR Package TFBGA25 TFBGA25 Packaging Tube Tape and Reel
March 2007
Rev 1
1/17
www.st.com 17
Contents
ST6G3238BE
Contents
1 2 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin connection and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 4 5 6 7 8 9
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 I/O and test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
ST6G3238BE
Logic diagram
1
Figure 1.
Logic diagram
Block diagram
VCCB
R8 R9 R10 R11 R12
A-SIDE
CMD-dir CMD.h DATA0-dir DAT0.h DAT123-dir DAT1.h DAT2.h DAT3.h CLK.h CLK-f
R0
R1 R7
B-SIDE
R0
R2
CMD
R0
R3
DAT0
R0
R4
DAT1
R0 R0
R5
DAT2 DAT3
R6
CLK
VCCA
WP CD
R13
R14
GND
GND
Table 1.
Integrated ESD protection and resistor on B-Side
Resistors Value 40 25 20% 70k 15k 470k 30% Bi-directional Zener diodes Vbr min. Line capacitance 14V @ 1mA < 20 pF
R1, R2, R3, R4, R5, R6 R0 Tolerance R10, R11, R12 R9 R7 Tolerance
Table 2.
Integrated pull-up resistors on WP and CD pins on A-Side
Resistors R13 R14 Tolerance Value 100k 100k 30% 3/17
Pin connection and function
ST6G3238BE
2
Figure 2.
Pin connection and function
Pin connection (top through view for TFBGA)
1 A B C D E
2
3
4
5
DAT0-dir VCCA CMD-dir CMD.h DAT0.h DAT1.h DAT2.h DAT3.h
1 2 3 4 5 6 7 8 9 10 11 12
TFBGA25
CLK-f CLK.h GND NC
1 A B C D E
DAT2.h DAT3.h CLK.h DAT0.h DAT1.h
2
CMDdir NC NC CMD.h CLK-f
3
DAT0. dir VCCA GND CD DAT12 3-dir
4
NC VCCB GND CMD WP
5
DAT2 DAT3 CLK DAT0 DAT1
TFBGA25
4/17
ST6G3238BE
Pin connection and function
2.1
Pin function

CMD, Command is a bi-directional line. The host and card drivers are operating in pushpull. DAT0-3, Data lines are bi-directional lines. The host and the card drivers are operating in push-pull mode. CLK, Clock is a host to card signal. CLK operates in push-pull mode. Feedback (return) Clock is feedback clock signal from level shifter to host for controlling delays. CD, Card detect, pulls HIGH state of input to VCCA. This pin is protected against ESD up to 8kV contact. WP, Write protect, pulls HIGH state of input to VCCA. This pin is protected against ESD up to 8kV contact. Pin description
Type I I/O I/O I I/O I/O I I/O I/O I/O I/O I/O I/O I O O Side A-side A-side B-Side A-Side A-Side B-Side A-Side A-Side A-Side A-Side B-Side B-Side B-Side A-Side B-Side A-Side A-Side A-Side A-Side B-Side Symbol CMD-dir CMD.h CMD DAT0-dir DAT0.h DAT0 DAT123-dir DAT1.h DAT2.h DAT3.h DAT1 DAT2 DAT3 CLK.h CLK CLK-f CD WP VCCA VCCB GND NC Name and function Command direction HIGH = A to B LOW = B to A A-side Command B-side Command Data Direction HIGH = A to B (write) LOW = B to A (read) Data Input / Output Data Input / Output Data Direction HIGH = A to B (write) LOW = B to A (read) Data Input / Output Data Input / Output Data Input / Output Data Input / Output Data Input / Output Data Input / Output Clock Input Clock Output Clock Feedback Card Detect Write Protect Power supply Power supply Ground (0V) No connect
Table 3.
TFBGA Pin N A2 D2 D4 A3 D1 D5 E3 E1 A1 B1 E5 A5 B5 C1 C5 E2 D3 E4 B3 B4 C3, C4 A4, B2, C2
5/17
Summary description
ST6G3238BE
3
Table 4.
Summary description
Truth table
Function DAT1.h DAT1 DAT2 DAT3 X X X X OUTPUT INPUT B=A A=B B=A A=B B=A A=B Output
CMD-dir DAT0-dir DAT123-dir
CMD.h
CMD
DAT0.h
DAT0
DAT2.h DAT3.h
H L X X X X
X X H L X X
X X X X H L
INPUT OUTPUT X X X X
OUTPUT INPUT X X X X
X X INPUT OUTPUT X X
X X OUTPUT INPUT X X
X X X X INPUT OUTPUT
Note:
X = Don't care; Z = High Impedance
6/17
ST6G3238BE
Maximum rating
4
Maximum rating
Stressing the device above the rating listed in the "Absolute Maximum Ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 5.
Symbol VCCA VCCB VI VI/OA VI/OB VI/OA VI/OB IIK IOK IOA IOB ICCA ICCB PD Tstg TL Supply voltage Supply voltage DC input voltage DC I/O voltage (output disabled) DC I/O voltage (output disabled) DC output voltage DC output voltage DC input diode current DC output diode current DC output current DC output current DC VCC or ground current DC VCC or ground current Power dissipation Storage temperature Lead temperature (10 sec)
Absolute maximum ratings
Parameter Value -0.5 to 4.6 -0.5 to 4.6 -0.5 to 4.6 -0.5 to 4.6 -0.5 to 4.6 -0.5 to VCCA + 0.5 -0.5 to VCCB + 0.5 -20 -50 50 50 100 100 400 -65 to +150 260 Unit V V V V V V V mA mA mA mA mA mA mW C C
Table 6.
Symbol VCCA VCCB VI VI/OA VI/OB Top dt/dv
Recommended operating conditions
Parameter Supply voltage Supply voltage Input voltage (CMD-dir/DAT0-dir/DAT123-dir) I/O voltage I/O voltage Operating temperature Input rise and fall time (1) Value 1.4 to VCCB 1.4 to 3.6 0 to VCCA 0 to VCCA 0 to VCCB -40 to +85 0 to 10 Unit V V V V V C ns/V
1. VIN from 0.8V to 2.0V at VCC = 3.0V
7/17
DC and AC parameters
ST6G3238BE
5
Table 7.
DC and AC parameters
DC specification
Test conditions Value TA = 25C Min. 0.65VCCA 1.7 2.0 0.35VCCA 0.7 0.8 0.65VCCB 1.7 2.0 0.35VCCB 0.7 0.8 IOH = -100A IOH = -1 mA IOH = -2 mA IOH = -4 mA IOH = -8 mA IOL = 100A IOL = 1 mA IOL = 2 mA IOL = 4 mA IOL = 8 mA IOH = -100A IOH = -1 mA IOH = -4 mA IOH = -6 mA IOH = -8 mA VCCA-0.2 1.05 1.20 1.75 2.30 VCCA-0.1 1.20 1.40 1.90 2.45 0.10 0.20 0.25 0.40 0.55 VCCA-0.2 1.05 1.20 1.75 2.30 V VCCA-0.1 1.20 1.40 1.90 2.45 0.10 0.20 0.25 0.40 0.55 V V 0.65VCCB 1.7 2.0 0.35VCCB 0.7 0.8 V V Max. -40 to 85C Min. 0.65VCCA 1.7 2.0 0.35VCCA 0.7 0.8 V V Max. Unit
Symbol
Parameter
VCCA (V) 1.4-1.95
VCCB (V)
High level input (A port) voltage
VIH
VCCA to 1.95-2.7 3.6 2.7-3.6 1.4-1.95 VCCA to 1.95-2.7 3.6 2.7-3.6 1.4-1.95 1.4 to VCCB 1.95-2.7 2.7-3.6
Low level input (A port) voltage
VIL
High level input (B port) voltage
VIH
Low level input (B port) voltage
VIL
1.4-1.95 1.4 to VCCB 1.4-3.6 1.4 1.95-2.7 2.7-3.6 1.4-3.6 1.4 1.65 2.3 3 1.4-3.6 1.4 1.65 2.3 3 1.4-3.6 1.4 1.65 2.3 3
High level output (A port) voltage
VOH
1.65 2.3 3 1.4-3.6 1.4
Low level output (A port) voltage
VOL
1.65 2.3 3 1.4-3.6 1.4
High level output (B port) voltage
VOH
1.65 2.3 3
Note:
All A-port I/Os and control inputs are powered by VCCA. All B-port I/Os are powered by VCCB.
8/17
ST6G3238BE
Table 7. DC specification (continued)
Test conditions Symbol Parameter VCCA (V) 1.4-3.6 1.4 Low level output (B port) voltage VOL 1.65 2.3 3 Input leakage current for Aside VCCB (V) 1.4-3.6 1.4 1.65 2.3 3 IOL = 100A IOL = 1 mA IOL = 4 mA IOL = 6 mA IOL = 8 mA VIA=VCC or GND DIR=HIGH VCD=VWP=V
CCA
DC and AC parameters
Value TA = 25C Min. Max. 0.20 0.35 0.45 0.55 0.70 -40 to 85C Min. Max. 0.20 0.35 0.45 0.55 0.70 V Unit
IIA
1.8
2.9
0.5
5
A
VCLK.h=VCCA VCMD= VCCB IIB Input leakage current for Bside VDAT0,DAT1,D AT2=VCCB VDAT3=GND DIR=LOW VCD=VWP=V
CCA
1.8
2.9
0.5
5
A
ICCA
Quiescent supply current for A-side
1.4 - 3.6 VIA=VCCA or GND 1.4 - 3.6 0 VCD = VWP = VCCA 1.4 - 3.6 3.6 DIR = A to B 1.4 1.4 - 3.6 VCLK.h=VCCA or GND VIB=OPEN 3.6 DIR = B to A VCD = VWP= VCCA VIA=VCCA or GND DIR=HIGH VWP=GND VIA=VCCA or GND DIR=HIGH VCD=GND
1.4
0.5
5
A
ICCB
Quiescent supply current for B-side
1.4 - 3.6
0.5
5
A
IWP
WP pin input leakage current
1.8
3.0
36
A
ICD
CD pin input leakage current
1.8
3.0
36
A
9/17
DC and AC parameters Table 8.
ST6G3238BE
AC electrical characteristics (f = 1MHz, 50% duty cycle, CL = 30pF, RL = 500)
Test condition TA = -40 to 85 C VCCA = 1.8 0.15V VCCB=2.5 0.2V Min. Max. 7.2 5.8 0.5 0.5 52 52 52 52 52 52 52 52 VCCA=1.8 0.15V VCCA=2.5 0.2V Unit VCCB=2.7 0.3V Min. 1.0 1.0 Max. 6.6 5.4 0.5 0.5 52 52 52 52 VCCB=2.7 0.3V Min. 1.0 1.0 Max. 6.1 ns Propagation delay time Bn to An 1.0 4.8 0.5 0.5 ns ns MHz Mbps
Symbol
Parameter
tPLH tPHL tPLH tPHL
Propagation delay time An to Bn
1.0
tOSLH tOSHL Output to output skew time (1)(2) tCDLH tCDHL Clock and data skew time Clock fmax Data From A to B From B to A From A to B From B to A
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW ( tOSLH = | tPLHm = tPLHn |, tOSHL = | tPHLm - tPHLn | ) 2. Parameter guaranteed by design.
Table 9.
Output slew rate (f = 1MHz, 50% duty cycle, CL=30pF, RL=500)
Test condition TA = -40 to 85 C
Symbol
Parameter
From
To
VCCA = 1.8V 0.15V VCCB = 3V 0.3V Min. Max. 3 3
Unit
tr tf
Rise time Fall time
20% 80%
80% 20%
ns ns
Table 10.
Capacitance characteristics
Test condition Value TA = 25 C Min. Typ. 9 17 Max. -40 to 85 C Min. Max. pF pF Unit
Symbol
Parameter
VCCB (V) open 3.3
VCCA (V) open 2.5
CINB CI/OA
Input capacitance Input/Output capacitance for A-SIDE Input/Output capacitance for B-SIDE Power dissipation capacitance
CI/OB CPD(1)
3.3 3.3 3.3
2.5 2.5 1.8 f = 10MHz
33 29 29
pF
pF
1. CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average current can be obtained by the following equation. ICC(opr) - CPD x VCC x fIN + ICC/16 (per circuit)
Note:
10/17
VIA = Input I/Os including CLK.h, CMD.h, DAT0.h, DAT1.h, DAT2.h, DAT3.h VIB = Input I/Os including CMD, DAT0, DAT1, DAT2, DAT3
ST6G3238BE
I/O and test circuit
6
Figure 3.
I/O and test circuit
Input and output equivalent circuit
Figure 4.
Test cicuit
Table 11.
Test values
Test Switch Open 6V 2VCC GND
tPLH, tPHL tPZL, tPLZ (VCC = 3.0 to 3.6V) tPZL, tPLZ (VCC = 2.3 to 2.7V or VCC = 1.6 to 1.95V) tPZH, tPHZ
11/17
Waveforms
ST6G3238BE
7
Figure 5.
Waveforms
Waveform - propagation delay (f = 1 MHz, 50% duty cycle)
Table 12.
Waveform symbol value
VCC
Symbol 3.0 to 3.6V VIH VM VX VY VCC 1.5V VOL+0.3V VOL-0.3V 2.3 to 2.7V VCC VCC/2 VOL+0.15V VOL-0.15V 1.65 to 1.95V VCC VCC/2 VOL+0.15V VOL-0.15V
Note:
CL = 30pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
12/17
ST6G3238BE
Package mechanical data
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
13/17
Package mechanical data
ST6G3238BE
Table 13.
Dim Ref
TFBGA25 mechanical data
Dimension (mm) Min. Typ. 1.10 Max 1.16 0.25 0.78 0.25 2.90 0.30 3.0 2.0 2.90 3.0 2.0 0.50 0.25 3.10 0.114 0.86 0.35 3.10 0.031 0.010 0.114 0.012 0.118 0.079 0.118 0.079 0.020 0.010 0.122 Min. 0.039 Dimension (inch) Typ. 0.043 Max 0.046 0.010 0.034 0.014 0.122
A A1 A2 b D D1 E E1 e SE
1.0
Figure 6.
Package dimensions
14/17
ST6G3238BE
Table 14.
Dim Ref Min. Typ. Max Min.
Package mechanical data
TFBGA25 tape and reel information
Dimension (mm) Dimension (inch) Typ. Max
A C D N T Ao Bo Ko Po P 3.9 7.9 3.3 3.3 1.60 12.8 20.2 60
330 13.2 0.504 0.795 2.362 14.4 0.130 0.130 0.063 4.1 8.1 0.153 0.311
12.992 0.519
0.567
0.161 0.319
Figure 7.
Reel dimension
15/17
Revision history
ST6G3238BE
9
Revision history
Table 15.
Date 22-Mar-2007
Revision history
Revision 1 First release Change
16/17
ST6G3238BE
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